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Single-chip implementation of a 32-bit motor-drive-specific microcontroller with floating-point unit SCIE SCOPUS

Title
Single-chip implementation of a 32-bit motor-drive-specific microcontroller with floating-point unit
Authors
Kim, JCLee, SHLee, JHLee, DYJung, CPark, HJMok, ISKim, HGPark, GW
Date Issued
1999-09
Publisher
IEICE-INST ELECTRONICS INFORMATION CO
Abstract
A 32-bit motor-drive-specific microcontroller chip was newly designed, implemented using a 0.8 mu m double-metal CMOS process, and its feasibility was successfully tested by applying the fabricated microcontroller chip to a real AC induction motor drive system. The microcontroller chip includes a single-precision floating-point unit, peripheral devices for motor drive, and a memory controller as well as the SPARC V7 CPU. The pipeline scheme and the two-step multiplication method were used in the multiplier of floating-point unit for the best area and speed trade-off, using the standard cell library available for the design. The chip size is 12.7 x 12.8 mm(2), the number of transistors is around 562,000, and the power consumption is 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz. Both a standard cell library and a full-custom layout were used in the implementation.
URI
https://oasis.postech.ac.kr/handle/2014.oak/10273
ISSN
0916-8524
Article Type
Article
Citation
IEICE TRANSACTIONS ON ELECTRONICS, vol. E82C, no. 9, page. 1699 - 1706, 1999-09
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박홍준PARK, HONG JUNE
Dept of Electrical Enginrg
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