Conference
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Baek, Seunghan | - |
| dc.contributor.author | Kim, Sunmean | - |
| dc.contributor.author | Choi, Youngchang | - |
| dc.contributor.author | Kang, Seokhyeong | - |
| dc.date.accessioned | 2021-06-01T06:58:51Z | - |
| dc.date.available | 2021-06-01T06:58:51Z | - |
| dc.date.created | 2021-03-10 | - |
| dc.date.issued | 2020-10 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/105937 | - |
| dc.description.abstract | Ternary logic circuits can reduce circuit power consumption and interconnections. We propose a ternary to binary converter that uses multi-threshold CMOS (MTCMOS) for energy-efficient logic converting to use these benefits. We reduce the delay by 8.61%, power by 28.72% compared to the previous design. We also reduce area, and the number of transistors compared to the existing converter design. | - |
| dc.language | English | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.relation.isPartOf | 17th International System-on-Chip Design Conference, ISOCC 2020 | - |
| dc.relation.isPartOf | Proceedings - International SoC Design Conference, ISOCC 2020 | - |
| dc.title | MTCMOS-based Ternary to Binary Converter | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | 17th International System-on-Chip Design Conference, ISOCC 2020, pp.5 - 6 | - |
| dc.identifier.wosid | 000680824100003 | - |
| dc.citation.conferenceDate | 2020-10-21 | - |
| dc.citation.conferencePlace | KO | - |
| dc.citation.endPage | 6 | - |
| dc.citation.startPage | 5 | - |
| dc.citation.title | 17th International System-on-Chip Design Conference, ISOCC 2020 | - |
| dc.contributor.affiliatedAuthor | Kang, Seokhyeong | - |
| dc.identifier.scopusid | 2-s2.0-85100731304 | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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