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Memcapacitor based Minimum and Maximum Gate Design

Title
Memcapacitor based Minimum and Maximum Gate Design
Authors
Min, JiyoungKim, SunmeanKang, Seokhyeong
Date Issued
2021-10-07
Publisher
Institute of Electrical and Electronics Engineers Inc.
Abstract
In this paper, we suggest a new structure of complementary capacitive switch that is composed of two connected memcapacitors. We also propose MIN and MAX gates that use this structure. HSPICE simulation verified the behavior of these logic gates for a specific input pattern. The functionality of each logic gate was verified even for analog signal processing, and these logic gates will be useful in fuzzy logic processing.
URI
https://oasis.postech.ac.kr/handle/2014.oak/109682
Article Type
Conference
Citation
18th International System-on-Chip Design Conference, ISOCC 2021, page. 75 - 76, 2021-10-07
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