DC Field | Value | Language |
---|---|---|
dc.contributor.author | Choi, Youngchang | - |
dc.contributor.author | Kim, Sunmean | - |
dc.contributor.author | Lee, Kyongsu | - |
dc.contributor.author | Kang, Seokhyeong | - |
dc.date.accessioned | 2022-03-02T00:23:45Z | - |
dc.date.available | 2022-03-02T00:23:45Z | - |
dc.date.created | 2022-02-20 | - |
dc.date.issued | 2021-05-23 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/109690 | - |
dc.description.abstract | This paper proposes the design of a ternary inverter that uses low current as input voltage is VDD/2. When the supply voltage is set to 1 V, current supplied by a voltage source as an input voltage VDD/2 is reduced by 22.75% from 1.89µA to 1.46µA. By connecting ternary inverters back-to-back, a tritstorage element is implemented as a ternary SRAM cell. This paper also presents the first verification of read/write schemes that consider noise margins. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.relation.isPartOf | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 | - |
dc.relation.isPartOf | Proceedings - IEEE International Symposium on Circuits and Systems | - |
dc.title | Design and analysis of a low-power ternary SRAM | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.identifier.bibliographicCitation | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 | - |
dc.identifier.wosid | 000696765400205 | - |
dc.citation.conferenceDate | 2021-05-22 | - |
dc.citation.conferencePlace | KO | - |
dc.citation.title | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 | - |
dc.contributor.affiliatedAuthor | Kang, Seokhyeong | - |
dc.identifier.scopusid | 2-s2.0-85109030863 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
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