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Approach to Improve the Performance Using Bit-level Sparsity in Neural Networks

Title
Approach to Improve the Performance Using Bit-level Sparsity in Neural Networks
Authors
Kang, YesungKwon, EunjiLee, SeunggyuByun, YounghoonLee, YoungjooKang, Seokhyeong
Date Issued
2021-02-02
Publisher
Institute of Electrical and Electronics Engineers Inc.
Abstract
This paper presents a convolutional neural network (CNN) accelerator that can skip zero weights and handle outliers, which are few but have a significant impact on the accuracy of CNNs, to achieve speedup and increase the energy efficiency of CNN. We propose an offline weight-scheduling algorithm which can skip zero weights and combine two non-outlier weights simultaneously using bit-level sparsity of CNNs. We use a reconfigurable multiplier-and-accumulator (MAC) unit for two purposes; usually used to compute combined two non-outliers and sometimes to compute outliers. We further improve the speedup of our accelerator by clipping some of the outliers with negligible accuracy loss. Compared to DaDianNao [7] and Bit-Tactical [16] architectures, our CNN accelerator can improve the speed by 3.34 and 2.31 times higher and reduce energy consumption by 29.3% and 30.2%, respectively.
URI
https://oasis.postech.ac.kr/handle/2014.oak/109924
Article Type
Conference
Citation
2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, page. 1516 - 1521, 2021-02-02
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이영주LEE, YOUNGJOO
Dept of Electrical Enginrg
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