DC Field | Value | Language |
---|---|---|
dc.contributor.author | BYUN, YOUNGHOON | - |
dc.contributor.author | Lee, Youngjoo | - |
dc.date.accessioned | 2022-03-03T05:43:35Z | - |
dc.date.available | 2022-03-03T05:43:35Z | - |
dc.date.created | 2022-03-03 | - |
dc.date.issued | 2021-05-23 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/110235 | - |
dc.description.abstract | In spite of the attractive accuracy, it is hard to use a deep convolutional neural network (DCNN) directly at the resource-limited devices due to the energy-consuming memory overheads, and thus the aggressive compression schemes are essentially utilized in practice to reduce the DCNN model size. As the recent methods have been individually developed, however, it is inevitable to exhaustively find the optimal combination of different approaches, requiring an enormous amount of search time. Given the complex baseline network, in this work, we introduce a rapid and systematic way to find the near-optimal memory-reduced DCNN option using multiple compression schemes together. We first precisely observe the accuracy-size trade-off of each method and make a novel interpolating scheme to speculate the accuracy of an arbitrary combination. We then present an iterative search algorithm to minimize the number of network evaluations for finding the memory-efficient DCNN structure satisfying the required accuracy. Experimental results reveal that our framework provides a similar compression level to the naive full-search strategy with three popular optimization methods while saving the search time by 7.35 times. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.relation.isPartOf | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 | - |
dc.relation.isPartOf | Proceedings - IEEE International Symposium on Circuits and Systems | - |
dc.title | Rapid design space exploration of near-optimal memory-reduced DCNN architecture using multiple model compression techniques | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.identifier.bibliographicCitation | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 | - |
dc.identifier.wosid | 000706507900015 | - |
dc.citation.conferenceDate | 2021-05-22 | - |
dc.citation.conferencePlace | KO | - |
dc.citation.title | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 | - |
dc.contributor.affiliatedAuthor | BYUN, YOUNGHOON | - |
dc.contributor.affiliatedAuthor | Lee, Youngjoo | - |
dc.identifier.scopusid | 2-s2.0-85109004289 | - |
dc.description.journalClass | 2 | - |
dc.description.journalClass | 2 | - |
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