A study on fabrication of synaptic device and simulation of 3D NAND flash memory for non-volatile memory applications

Abstract

As the demand for semiconductor memory increases, there is growing interest in research on the next-generation nonvolatile memory and efforts to resolve critical issues in memory devices. In this thesis, we fabricate artificial synaptic devices that operate by the charge/discharge of ions and simulate the mechanical stress and electrical characteristics analysis of 3D NAND flash memory using TCAD. In Chapter 1, we introduce the operation principles and research trends of neuromorphic devices and NAND flash memory. We also briefly introduce the process flow of the commercial TCAD simulator. In Chapter 2, we report three-terminal synaptic devices that emulate the human brain using SnS2-reduced graphene oxides (rGO) and ion-doped polyethylene oxide (PEO) for neuromorphic applications. SnS2-rGO can reversibly uptake and release Na+ ions by electrochemical reactions. When voltage is applied to the gate, the conductance change of the channel is induced by ion migration from the electrolyte to the channel. The devices can emulate essential synaptic functions including EPSC, PPF, spatiotemporal signal processing, transition from short-term to long-term plasticity, and STDP. The linear and symmetric potentiation /depression characteristics required for neuromorphic devices were also obtained. Therefore, we demonstrate the feasibility of neuromorphic memory using electro-chemical devices with the movement of sodium ions. In Chapter 3, we report the relationship between mechanical stress and electrical characteristics in 3D NAND flash memory and how to improve device reliability. The 3D NAND structure is modeled using the TCAD tool. The residual stress of the channel and on-current are analyzed according to the deposition temperature of the poly-Si channel, tunneling oxide and tungsten WL. The high tensile stress of the channel increased the on-current of the device. The memory characteristics such as program and erase operations, and memory window variations are confirmed. Then, we suggest the optimal deposition conditions to solve the issue of reliability deterioration with increasing the number of stacked layers of 3D NAND.