DC Field | Value | Language |
---|---|---|
dc.contributor.author | Koo, Jahyun | - |
dc.contributor.author | Sim, Jae-Yoon | - |
dc.date.accessioned | 2022-06-23T02:50:09Z | - |
dc.date.available | 2022-06-23T02:50:09Z | - |
dc.date.created | 2022-03-03 | - |
dc.date.issued | 2022-02 | - |
dc.identifier.issn | 1063-8210 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/113097 | - |
dc.description.abstract | © 2021 IEEE.This article proposes a circuit architecture and design strategy of a low-noise oscillator based on the distributed RC network. The distributed RC network receives a differential step input and propagates the true phase through the resistive path while the complementary phase through the capacitive path. It effectively suppresses the effect of noise by increasing the signal transition slope at the time of interest. It is achieved by embedding a bandpass characteristic with a phase delay of π. A 358-kHz quadrature oscillator with a fourth-stage RC network is implemented using the 0.18- μm CMOS process. It achieves an figure of merit (FoM) of -161.2 dBc/Hz at a 100-Hz offset with a stable 20-dB roll-off in the phase noise and an Allan deviation floor of less than 0.7 ppm. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.relation.isPartOf | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | - |
dc.title | Low-Noise Distributed RC Oscillator | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/TVLSI.2021.3131170 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.30, no.2, pp.143 - 152 | - |
dc.identifier.wosid | 000732208700001 | - |
dc.citation.endPage | 152 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 143 | - |
dc.citation.title | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | - |
dc.citation.volume | 30 | - |
dc.contributor.affiliatedAuthor | Sim, Jae-Yoon | - |
dc.identifier.scopusid | 2-s2.0-85124617098 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.type.docType | Article | - |
dc.subject.keywordPlus | DIFFERENTIAL RELAXATION-OSCILLATOR | - |
dc.subject.keywordPlus | PHASE-NOISE | - |
dc.subject.keywordPlus | LOW-POWER | - |
dc.subject.keywordPlus | JITTER | - |
dc.subject.keywordAuthor | frequency stability | - |
dc.subject.keywordAuthor | Frequency-locked loop (FLL) | - |
dc.subject.keywordAuthor | low-noise | - |
dc.subject.keywordAuthor | offset compensation | - |
dc.subject.keywordAuthor | RC oscillator | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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