DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kong, Byeong Yong | - |
dc.contributor.author | Yoo, Hoyoung | - |
dc.contributor.author | LEE, YOUNGJOO | - |
dc.date.accessioned | 2024-03-06T01:20:45Z | - |
dc.date.available | 2024-03-06T01:20:45Z | - |
dc.date.created | 2024-02-21 | - |
dc.date.issued | 2023-02-07 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/121389 | - |
dc.description.abstract | In this paper, a systematic synthesis framework to quickly identify the maximum operating frequency of very large scale integration (VLSI) circuits is presented. Unlike the manual framework that requires the intervention of a circuit designer to decide the timing constraint to apply, the proposed framework automatically decides the constraint based on a programmable strategy rather than just waiting for the decision by the designer. As a result, the total elapsed times required to find the maximum operating frequency can be greatly shortened. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.relation.isPartOf | 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023 | - |
dc.relation.isPartOf | 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023 | - |
dc.title | An Automated Synthesis Framework for Fast Evaluation of Maximum Operating Frequency | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.identifier.bibliographicCitation | 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023 | - |
dc.citation.conferenceDate | 2023-02-05 | - |
dc.citation.conferencePlace | SI | - |
dc.citation.title | 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023 | - |
dc.contributor.affiliatedAuthor | LEE, YOUNGJOO | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
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