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dc.contributor.authorLEE, SOHUN-
dc.contributor.authorEUIJIN, SEO-
dc.contributor.authorDONGHYEON, KIM-
dc.contributor.authorLEE, JEONG WOOK-
dc.date.accessioned2024-03-06T06:26:27Z-
dc.date.available2024-03-06T06:26:27Z-
dc.date.created2024-02-19-
dc.date.issued2023-11-10-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/121810-
dc.publisher한국공업화학회-
dc.relation.isPartOf2023 한국공업화학회 추계 총회 및 학술대회-
dc.titleExploring and Standardizing the Functionality of Genetic Logic Gates in Synthetic Circuits-
dc.typeConference-
dc.type.rimsCONF-
dc.identifier.bibliographicCitation2023 한국공업화학회 추계 총회 및 학술대회-
dc.citation.conferenceDate2023-11-08-
dc.citation.conferencePlaceKO-
dc.citation.title2023 한국공업화학회 추계 총회 및 학술대회-
dc.contributor.affiliatedAuthorLEE, SOHUN-
dc.contributor.affiliatedAuthorEUIJIN, SEO-
dc.contributor.affiliatedAuthorDONGHYEON, KIM-
dc.contributor.affiliatedAuthorLEE, JEONG WOOK-
dc.description.journalClass2-
dc.description.journalClass2-

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Dept. of Chemical Enginrg
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