DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chang-Woo Sohn | - |
dc.contributor.author | Chang Yong Kang | - |
dc.contributor.author | Myung-Dong Ko | - |
dc.contributor.author | Do-Young Choi | - |
dc.contributor.author | Hyun Chul Sagong | - |
dc.contributor.author | Eui-Young Jeong | - |
dc.contributor.author | Park, CH | - |
dc.contributor.author | Sang-Hyun Lee | - |
dc.contributor.author | Ye-Ram Kim | - |
dc.contributor.author | Chang-Ki Baek | - |
dc.contributor.author | Jeong-Soo Lee | - |
dc.contributor.author | Jack C. Lee | - |
dc.contributor.author | Jeong, YH | - |
dc.date.accessioned | 2016-03-31T08:10:41Z | - |
dc.date.available | 2016-03-31T08:10:41Z | - |
dc.date.created | 2013-04-19 | - |
dc.date.issued | 2013-04 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.other | 2013-OAK-0000029400 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/14731 | - |
dc.description.abstract | In this paper, a simple but accurate model is presented to analyze source/drain (S/D) series resistance in trigate fin field-effect transistors, particularly on triangular or pentagonal rather than rectangular epitaxy. The model includes the contribution of spreading, sheet, and contact resistances. Although the spreading and sheet resistances are evaluated modifying standard models, the contact resistance is newly modeled using equivalent models of lossy transmission lines and transformations of 3-D to 2-D geometry. Compared with series resistance extracted from 3-D numerical simulations, the model shows excellent agreement, even when the S/D geometry, silicide contact resistivity, and S/D doping concentration are varied. We find that the series resistance is influenced more by contact surface area than by carrier path from the S/D extension to the silicide contact. To meet the series resistance targeted in the semiconductor roadmap, both materials and geometry will need to be optimized, i.e., lowering the silicide contact resistivity and keeping high doping concentration as well as maximizing the contact surface area, respectively. | - |
dc.description.statementofresponsibility | X | - |
dc.language | English | - |
dc.publisher | IEEE | - |
dc.relation.isPartOf | IEEE TRANSACTONS ON ELECTRON DEVICES | - |
dc.title | Analytic model of S/D series resistance in trigate finfets with polygonal epitaxy | - |
dc.type | Article | - |
dc.contributor.college | 창의IT융합공학과 | - |
dc.identifier.doi | 10.1109/TED.2013.2246790 | - |
dc.author.google | Sohn, CW | - |
dc.author.google | Kang, CY | - |
dc.author.google | Ko, MD | - |
dc.author.google | Choi, DY | - |
dc.author.google | Sagong, HC | - |
dc.author.google | Jeong, EY | - |
dc.author.google | Park, CH | - |
dc.author.google | Lee, SH | - |
dc.author.google | Kim, YR | - |
dc.author.google | Baek, CK | - |
dc.author.google | Lee, JS | - |
dc.author.google | Lee, JC | - |
dc.author.google | Jeong, YH | - |
dc.relation.volume | 60 | - |
dc.relation.issue | 4 | - |
dc.relation.startpage | 1302 | - |
dc.relation.lastpage | 1309 | - |
dc.contributor.id | 10644344 | - |
dc.relation.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.relation.index | SCI급, SCOPUS 등재논문 | - |
dc.relation.sci | SCI | - |
dc.collections.name | Journal Papers | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTONS ON ELECTRON DEVICES, v.60, no.4, pp.1302 - 1309 | - |
dc.identifier.wosid | 000316821800003 | - |
dc.date.tcdate | 2019-01-01 | - |
dc.citation.endPage | 1309 | - |
dc.citation.number | 4 | - |
dc.citation.startPage | 1302 | - |
dc.citation.title | IEEE TRANSACTONS ON ELECTRON DEVICES | - |
dc.citation.volume | 60 | - |
dc.contributor.affiliatedAuthor | Chang-Ki Baek | - |
dc.contributor.affiliatedAuthor | Jeong-Soo Lee | - |
dc.contributor.affiliatedAuthor | Jeong, YH | - |
dc.identifier.scopusid | 2-s2.0-84875490035 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 13 | - |
dc.description.scptc | 12 | * |
dc.date.scptcdate | 2018-05-121 | * |
dc.type.docType | Article | - |
dc.subject.keywordPlus | LOGIC TECHNOLOGY | - |
dc.subject.keywordPlus | TRANSISTORS | - |
dc.subject.keywordPlus | DESIGN | - |
dc.subject.keywordAuthor | Contact resistance | - |
dc.subject.keywordAuthor | epitaxial growth | - |
dc.subject.keywordAuthor | fin field-effect transistor (FinFET) | - |
dc.subject.keywordAuthor | multiple-gate | - |
dc.subject.keywordAuthor | polygonal shape | - |
dc.subject.keywordAuthor | raised source drain | - |
dc.subject.keywordAuthor | series resistance | - |
dc.subject.keywordAuthor | transmission line model | - |
dc.subject.keywordAuthor | trigate | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
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