DC Field | Value | Language |
---|---|---|
dc.contributor.author | 김윤지 | en_US |
dc.date.accessioned | 2014-12-01T11:48:39Z | - |
dc.date.available | 2014-12-01T11:48:39Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.other | OAK-2014-01344 | en_US |
dc.identifier.uri | http://postech.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000001560597 | en_US |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/1846 | - |
dc.description | Master | en_US |
dc.description.abstract | A sample clock generator circuit for an analog beamformer is implemented by using a NOR-type MASK ROM look-up table and digital blocks. To reduce the size of the look-up table, the sampling time interval is kept constant until the error reaches ±4Ts (Ts : period of 160MHz clock) and it is either increased or decreased by only one Ts per step. The look-up table stores the focal point number and the UP/DN code. The size of the look-up table is 1.97Mbit for a 64-channel transducer with the maximum delay of 7.9usec. | en_US |
dc.language | kor | en_US |
dc.publisher | 포항공과대학교 | en_US |
dc.rights | BY_NC_ND | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/2.0/kr | en_US |
dc.title | 초음파 영상 장치의 아날로그 빔포머 용 샘플 클락 생성기 | en_US |
dc.title.alternative | Sample Clock Generator for Analog Beamformer of Ultrasound Imaging System | en_US |
dc.type | Thesis | en_US |
dc.contributor.college | 일반대학원 전자전기공학과 | en_US |
dc.date.degree | 2013- 2 | en_US |
dc.type.docType | Thesis | - |
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