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dc.contributor.author윤지나en_US
dc.date.accessioned2014-12-01T11:49:24Z-
dc.date.available2014-12-01T11:49:24Z-
dc.date.issued2014en_US
dc.identifier.otherOAK-2014-01770en_US
dc.identifier.urihttp://postech.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000001737998en_US
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/2272-
dc.descriptionMasteren_US
dc.description.abstractMulti-level cell (MLC) phase-change RAM (PRAM) is a promising candidate to enable a low cost main memory. Resistance (R) drift is the most critical problem in realizing MLC PRAM. In order to avoid R drift-induced bit errors, scrub (which periodically reads and, after correcting errors incurred by R drift, writes PRAM data) is expected to be utilized in real PRAM designs due to its simplicity. However, it can degrade PRAM lifetime due to excessive PRAM writes for scrub operations. Considering that MLC PRAM can endure only 105 ~ 106 writes, scrub writes need to be minimized. In this paper, we propose a novel scrub method which utilizes the information of data value (zero and intermediate levels in 2-bit data) to reduce scrub writes thereby reducing scrub-induced writes as well as additional energy consumption. Our experiments, which run SPEC2006 benchmarks on hybrid DRAM and MLC PRAM main memory, show that our proposed method offers average 82.0% reduction in scrub writes, which translates into average 15.1%, 1.9% and 24.5% improvement in the PRAM energy consumption, the program performance and the PRAM writes, respectively, compared to the state-of-the-art compression-based method.en_US
dc.languageengen_US
dc.publisher포항공과대학교en_US
dc.rightsBY_NC_NDen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/2.0/kren_US
dc.titleData Value-Aware Scrub to Address Resistance Drift in Multi-Level Cell Phase-Change RAMen_US
dc.typeThesisen_US
dc.contributor.college일반대학원 전자전기공학과en_US
dc.date.degree2014- 8en_US
dc.type.docTypeThesis-

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