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dc.contributor.authorLee, SH-
dc.contributor.authorKim, PK-
dc.contributor.authorMoon, W-
dc.contributor.authorLim, G-
dc.contributor.author임근배-
dc.date.accessioned2016-04-01T01:42:40Z-
dc.date.available2016-04-01T01:42:40Z-
dc.date.issued2007-01-
dc.identifier.citationMICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS-
dc.identifier.citationv.13-
dc.identifier.citationno.39939-
dc.identifier.citationpp.579-587-
dc.identifier.issn0946-7076-
dc.identifier.other2007-OAK-0000006638-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/23533-
dc.description.abstractWe fabricate and characterize a three-dimensional (3-D) MOS (metal-oxide-semiconductor) transistor tip integrated micro cantilever to measure the surface properties. The 3-D MOS transistor tip is fabricated on the front side end of the cantilever, and the cantilever itself works as a tip. These features make the device possible to investigate hard-detecting parts such as the deep trenches and the sidewalls of the structure. The MOS transistor tip has other advantages such as the high operation speed, the high sensitivity, and the reduction of the required equipments like the lock-in-amplifier. The MOS transistor tip is fabricated three-dimensionally, utilizing the lateral diffusion and the anisotropic wet etching with TMAH solution, since the etch rate of {211} plane is much higher than those of {100} or {111} planes. The gate area is formed by self-aligned technique, using crystallographic dependant wet etching. The well-known convex corner compensation pattern is used for the gate length control during the tip fabrication process. The characteristics of the fabricated device are measured with respect to the various electric signals and the results show the well-established detection properties.-
dc.description.statementofresponsibilityX-
dc.publisherSPRINGER-
dc.subjectATOMIC-FORCE-MICROSCOPE-
dc.subjectSENSOR-
dc.subjectSTORAGE-
dc.subjectPROBE-
dc.titleFabrication and characterization of 3-Dimensional MOS transistor tip integrated micro cantilever-
dc.typeConference-
dc.contributor.college기계공학과-
dc.identifier.doi10.1007/S00542-006-0-
dc.author.googleLee, SH-
dc.author.googleKim, PK-
dc.author.googleMoon, W-
dc.author.googleLim, G-
dc.relation.volume13-
dc.relation.issue39939-
dc.relation.startpage579-
dc.relation.lastpage587-
dc.contributor.id10097203-
dc.publisher.locationUS-
dc.relation.journalMICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS-
dc.relation.indexSCI급, SCOPUS 등재논문-
dc.relation.sciSCI-
dc.collections.nameConference Papers-
dc.type.docTypeProceedings Paper-

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