Area-efficient method to approximate two minima for LDPC decoders
SCIE
SCOPUS
- Title
- Area-efficient method to approximate two minima for LDPC decoders
- Authors
- Jung, J; Lee, Y; Park, IC
- Date Issued
- 2014-11-06
- Publisher
- IEE
- Abstract
- A simple yet effective method is proposed to reduce the hardware complexity of min-sum-based low-density parity-check (LDPC) decoders. The proposed method finds the second minimum from the last four candidates of the first minimum, and can be implemented with only a few hardware components. In the case of 64 inputs, the proposed method reduces the comparators and 2-to-1 multiplexers by 48 and 64% compared to the conventional method that finds two exact minima.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/37542
- DOI
- 10.1049/EL.2014.1549
- ISSN
- 0013-5194
- Article Type
- Article
- Citation
- ELECTRONICS LETTERS, vol. 50, no. 23, page. 1701 - U121, 2014-11-06
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