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Cited 14 time in webofscience Cited 16 time in scopus
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An On-chip Learning Neuromorphic Autoencoder with Current-Mode Transposable Memory Read and Virtual Lookup Table SCIE SCOPUS

Title
An On-chip Learning Neuromorphic Autoencoder with Current-Mode Transposable Memory Read and Virtual Lookup Table
Authors
Cho, HwasukSon, HyunwooSeong, KihwanKIM, BYUNGSUBPARK, HONG JUNESIM, JAE YOON
Date Issued
2018-02
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Abstract
This paper presents an IC implementation of on-chip learning neuromorphic autoencoder unit in a form of rate-based spiking neural network. With a current-mode signaling scheme embedded in a 500 × 500 6b SRAM-based memory, the proposed architecture achieves simultaneous processing of multiplications and accumulations. In addition, a transposable memory read for both forward and backward propagations and a virtual lookup table are also proposed to perform an unsupervised learning of restricted Boltzmann machine. The IC is fabricated using 28-nm CMOS process and is verified in a three-layer network of encoder–decoder pair for training and recovery of images with two-dimensional 16×16 pixels. With a dataset of 50 digits, the IC shows a normalized root mean square error of 0.078. Measured energy efficiencies are 4.46 pJ per synaptic operation for inference and 19.26 pJ per synaptic weight update for learning, respectively. The learning performance is also estimated by simulations if the proposed hardware architecture is extended to apply to a batch training of 60 000 MNIST datasets.
URI
https://oasis.postech.ac.kr/handle/2014.oak/41350
DOI
10.1109/TBCAS.2017.2762002
ISSN
1932-4545
Article Type
Article
Citation
IEEE Transactions on Biomedical Circuits and Systems, vol. 12, no. 1, page. 161 - 170, 2018-02
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김병섭KIM, BYUNGSUB
Dept of Electrical Enginrg
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