DC Field | Value | Language |
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dc.contributor.author | Kyung, S. | - |
dc.contributor.author | KWON, JIMIN | - |
dc.contributor.author | Kim, Y.-H. | - |
dc.contributor.author | Jung, S. | - |
dc.date.accessioned | 2018-06-15T05:33:27Z | - |
dc.date.available | 2018-06-15T05:33:27Z | - |
dc.date.created | 2017-12-21 | - |
dc.date.issued | 2017-02 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/50599 | - |
dc.description.abstract | Vertical stacking of thin-film transistors is an effective way to reduce the footprint of a device, thus increases transistor density in complex flexible electronic applications without reducing the feature size and resolution of the patterning tools. In this paper, we report a 3-D complementary organic FET fabricated on a plastic substrate by stacking a bottom-gate top-contact p-type transistor on a top-gate bottom-contact n-type transistor with a gate shared between the two. We used high-performance polymer semiconductors, poly [(E)-2, 7-bis (2 decyltetradecyl) 4 methyl 9 (5 (2 (5 methylthiophen 2 yl) vinyl) thiophen 2 yl) benzo [lmn] [3, 8] phenanthroline-1, 3, 6, 8 (2H, 7H)-tetraone] for n-type devices and poly [2, 5-bis (7-decylnonadecyl) pyrrolo [3, 4-c] pyrrole-1, 4 (2H, 5H)-dione-(E) 1,2 bis (5 (thiophen 2 yl) selenophen 2 yl) ethene] for p-type devices to fabricate the vertically stacked organic transistors along with a Cytop and cross-linked poly (4-vinylphenol) bilayer and Poly (Methyl Methacrylate) gate dielectric. A 3-D flexible complementary organic inverter exhibits a maximum static voltage gain of ?18 V/V and high noise immunity of up to 60% of VDD/2. The 3-D transistors show hysteresis-free I-V characteristics despite of low-temperature processes. Moreover, we discuss the influence of cross-linker concentration and the processing temperature of the PVP dielectric film on the degree of hysteresis in I-V characteristics. ? 2017 IEEE. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.title | Low-Temperature, Solution-Processed, 3-D Complementary Organic FETs on Flexible Substrate | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/TED.2017.2659741 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.5, pp.1955 - 1959 | - |
dc.identifier.wosid | 000399935800008 | - |
dc.date.tcdate | 2019-02-01 | - |
dc.citation.endPage | 1959 | - |
dc.citation.number | 5 | - |
dc.citation.startPage | 1955 | - |
dc.citation.title | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.volume | 64 | - |
dc.contributor.affiliatedAuthor | KWON, JIMIN | - |
dc.contributor.affiliatedAuthor | Jung, S. | - |
dc.identifier.scopusid | 2-s2.0-85013230594 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 1 | - |
dc.type.docType | Article | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
dc.subject.keywordPlus | THIN-FILM TRANSISTORS | - |
dc.subject.keywordPlus | ELECTRONICS | - |
dc.subject.keywordPlus | CIRCUITS | - |
dc.subject.keywordPlus | MOBILITY | - |
dc.subject.keywordAuthor | 3-D integrated circuits | - |
dc.subject.keywordAuthor | flexible printed circuits | - |
dc.subject.keywordAuthor | organic thin-film transistors | - |
dc.subject.keywordAuthor | solution process | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
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