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dc.contributor.author정홍-
dc.contributor.author김용-
dc.date.accessioned2018-06-15T09:30:15Z-
dc.date.available2018-06-15T09:30:15Z-
dc.date.created2009-08-19-
dc.date.issued2002-12-03-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/54394-
dc.publisherSST-2002-
dc.relation.isPartOf9th Australian International Conference on SPEECH SCIENCE & TECHNOLOGY 2002-
dc.relation.isPartOfSST-2002-
dc.titleA Systolic Architecture of DTW for Speech Recognition-
dc.typeConference-
dc.type.rimsCONF-
dc.identifier.bibliographicCitation9th Australian International Conference on SPEECH SCIENCE & TECHNOLOGY 2002, pp..-
dc.citation.conferenceDate2002-12-03-
dc.citation.conferencePlaceAT-
dc.citation.endPage.-
dc.citation.startPage.-
dc.citation.title9th Australian International Conference on SPEECH SCIENCE & TECHNOLOGY 2002-
dc.contributor.affiliatedAuthor정홍-
dc.contributor.affiliatedAuthor김용-
dc.description.journalClass1-
dc.description.journalClass1-

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정홍JEONG, HONG
Dept of Electrical Enginrg
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