Open Access System for Information Sharing

Login Library

 

Conference
Cited 0 time in webofscience Cited 0 time in scopus
Metadata Downloads
Full metadata record
Files in This Item:
There are no files associated with this item.
DC FieldValueLanguage
dc.contributor.author이정수-
dc.date.accessioned2018-06-19T05:03:05Z-
dc.date.available2018-06-19T05:03:05Z-
dc.date.created2016-12-20-
dc.date.issued2016-10-26-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/72358-
dc.publisher한국반도체디스플레이기술학회-
dc.relation.isPartOf2016 반도체디스플레이 심포지움 및 추계학술대회-
dc.titleVoid-free bottom-up electroplating for fabrication of through-silicon via-
dc.typeConference-
dc.type.rimsCONF-
dc.identifier.bibliographicCitation2016 반도체디스플레이 심포지움 및 추계학술대회-
dc.citation.conferenceDate2016-10-26-
dc.citation.conferencePlaceKO-
dc.citation.title2016 반도체디스플레이 심포지움 및 추계학술대회-
dc.contributor.affiliatedAuthor이정수-
dc.description.journalClass2-
dc.description.journalClass2-

qr_code

  • mendeley

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

Researcher

이정수LEE, JEONG SOO
Dept of Electrical Enginrg
Read more

Views & Downloads

Browse