구조적인 LDPC 부호의 설계 및 성능 분석

Abstract

The objective of this thesis is to develop schemes to construct algebraically structured low-density parity-check (LDPC) codes for improving their performance and memory efficiency. It is well-known that the sum-product algorithm provides optimum decoding for LDPC codes with no cycles. However, short cycles in the Tanner graph of LDPC codes may induce a serious performance degradation. Several researchers made an effort to obtain the LDPC codes with no short cycles. Quasi-cyclic LDPC (QC-LDPC) code is a type of LDPC codes, based on circulant permutation matrices. It required a smaller size of memory for encoding and/or decoding and are easier to analyze their algebraic properties than random LDPC codes. This motivates us to take an intensive interest in constructing nonbinary QC-LDPC codes without short cycles. In this thesis, we propose a construction method of nonbinary QC-LDPC codes without short cycles. We present the mathematical proof for girth and cycle properties of proposed design method. As a result, we present the constructing method for nonbinary QC-LDPC codes without short cycles and show it performs well.