Full metadata record
DC Field | Value | Language |
dc.contributor.author | KIM, YOUNG HWAN | - |
dc.contributor.author | Cho, Kyoungrok | - |
dc.contributor.author | Jeong. Minyoung | - |
dc.contributor.author | Jeong, Eungu | - |
dc.date.accessioned | 2019-04-08T07:32:59Z | - |
dc.date.available | 2019-04-08T07:32:59Z | - |
dc.date.created | 2019-03-13 | - |
dc.date.issued | 2018-05-29 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/98026 | - |
dc.publisher | IEEE | - |
dc.relation.isPartOf | International Symposium on Circuits and Systems | - |
dc.relation.isPartOf | ISCAS 2018 Proceedings | - |
dc.title | Extract LUT Logics from a Downloaded Bitstream Data in FPGA | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.identifier.bibliographicCitation | International Symposium on Circuits and Systems | - |
dc.citation.conferenceDate | 2018-05-27 | - |
dc.citation.conferencePlace | IT | - |
dc.citation.conferencePlace | Firenze | - |
dc.citation.title | International Symposium on Circuits and Systems | - |
dc.contributor.affiliatedAuthor | KIM, YOUNG HWAN | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
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