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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | SIM, JAE YOON | - |
| dc.contributor.author | Minseob Lee | - |
| dc.contributor.author | Shinwoong Kim | - |
| dc.contributor.author | Hwasuk Cho | - |
| dc.contributor.author | Jahyun Koo | - |
| dc.contributor.author | Kwang-Hee Choi | - |
| dc.contributor.author | Jin-Hyeok Choi | - |
| dc.contributor.author | Byungsub Kim | - |
| dc.contributor.author | Hong-June Park | - |
| dc.date.accessioned | 2019-04-08T08:35:40Z | - |
| dc.date.available | 2019-04-08T08:35:40Z | - |
| dc.date.created | 2019-03-11 | - |
| dc.date.issued | 2018-02-13 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/98363 | - |
| dc.publisher | 2018 IEEE International Solid - State Circuits Conference - (ISSCC) | - |
| dc.relation.isPartOf | IEEE International Solid-State Circuits Conference | - |
| dc.relation.isPartOf | IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE | - |
| dc.title | A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | IEEE International Solid-State Circuits Conference | - |
| dc.citation.conferenceDate | 2018-02-11 | - |
| dc.citation.conferencePlace | US | - |
| dc.citation.title | IEEE International Solid-State Circuits Conference | - |
| dc.contributor.affiliatedAuthor | SIM, JAE YOON | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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- 심재윤SIM, JAE YOON
- Dept of Electrical Enginrg