DC Field | Value | Language |
---|---|---|
dc.contributor.author | RHU, MINSOO | - |
dc.contributor.author | SULLIVAN, MIKE | - |
dc.contributor.author | LENG, JINGWEN | - |
dc.contributor.author | EREZ, MATTAN | - |
dc.date.accessioned | 2018-05-11T04:29:56Z | - |
dc.date.available | 2018-05-11T04:29:56Z | - |
dc.date.created | 2018-03-29 | - |
dc.date.issued | 2013-12-09 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/43376 | - |
dc.description.abstract | As GPU's compute capabilities grow, their memory hierarchy increasingly becomes a bottleneck. Current GPU memory hierarchies use coarse-grained memory accesses to exploit spatial locality, maximize peak bandwidth, simplify control, and reduce cache meta-data storage. These coarse-grained memory accesses, however, are a poor match for emerging GPU applications with irregular control flow and memory access patterns. Meanwhile, the massive multi-threading of GPUs and the simplicity of their cache hierarchies make CPU-specific memory system enhancements ineffective for improving the performance of irregular GPU applications. We design and evaluate a locality-aware memory hierarchy for throughput processors, such as GPUs. Our proposed design retains the advantages of coarse-grained accesses for spatially and temporally local programs while permitting selective fine-grained access to memory. By adaptively adjusting the access granularity, memory bandwidth and energy are reduced for data with low spatial/temporal locality without wasting control overheads or prefetching potential for data with high spatial locality. As such, our locality-aware memory hierarchy improves GPU performance, energy-efficiency, and memory throughput for a large range of applications. | - |
dc.publisher | IEEE/ACM | - |
dc.relation.isPartOf | IEEE/ACM International Symposium on Microarchitecture | - |
dc.relation.isPartOf | Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) | - |
dc.title | A Locality-Aware Memory Hierarchy for Energy-Efficient Throughput Processors | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.identifier.bibliographicCitation | IEEE/ACM International Symposium on Microarchitecture, pp.86 - 98 | - |
dc.citation.conferenceDate | 2013-12-07 | - |
dc.citation.conferencePlace | US | - |
dc.citation.endPage | 98 | - |
dc.citation.startPage | 86 | - |
dc.citation.title | IEEE/ACM International Symposium on Microarchitecture | - |
dc.contributor.affiliatedAuthor | RHU, MINSOO | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
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