Low Design Overhead Timing Error Correction Scheme for Elastic Clock Methodology
- Title
- Low Design Overhead Timing Error Correction Scheme for Elastic Clock Methodology
- Authors
- SUNGJU, RYU; JONGEUN, KOO; KIM, JAE JOON
- Date Issued
- 2017-07-24
- Publisher
- IEEE/ACM
- Abstract
- The elastic clock scheme is a robust design methodology to ensure timing closure under PVT variation using locally generated clocks and handshaking protocol. However, it still has a chance of timing errors due to delay mismatch between the data-path and delay replica. In this paper, we propose a low design overhead timing error correction scheme tailored to elastic clock. In the proposed scheme, a timing error can be corrected within a cycle using clock stretching. The proposed scheme shows 40.3× and 4.6× reduction in timing margin with 9.1% and 9.0% area overhead over the synchronous baseline and elastic clock design, respectively.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/42040
- Article Type
- Conference
- Citation
- International Symposium on Low Power Electronics and Design (ISLPED), 2017-07-24
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- There are no files associated with this item.
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